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f OCnPWM = ------------------
ATmega128
The P W M frequency for the output can be calculated by the following equation:
f clk_I/O
N ? 256
The N variable represents the prescale factor (1, 8, 64, 256, or 1024).
The extreme values for the OCR2 Register represents special cases when generating a P W M
waveform output in the fast P W M mode. If the OCR2 is set equal to BOTTOM, the output will be
a narrow spike for each MAX+1 timer clock cycle. Setting the OCR2 equal to MAX will result in a
constantly high or low output (depending on the polarity of the output set by the COM21:0 bits.)
A frequency (with 50% duty cycle) waveform output in fast P W M mode can be achieved by set-
ting OC2 to toggle its logical level on each compare match (COM21:0 = 1). The waveform
generated will have a maximum frequency of f OC2 = f clk_I/O /2 when OCR2 is set to zero. This fea-
ture is similar to the OC2 toggle in CTC mode, except the double buffer feature of the output
compare unit is enabled in the fast P W M mode.
Phase Correct PWM
Mode
The phase correct P W M mode ( W GM21:0 = 1) provides a high resolution phase correct P W M
waveform generation option. The phase correct P W M mode is based on a dual-slope operation.
The counter counts repeatedly from BOTTOM to MAX and then from MAX to BOTTOM. In non-
inverting Compare Output mode, the output compare (OC2) is cleared on the compare match
between TCNT2 and OCR2 while counting up, and set on the compare match while downcount-
ing. In inverting Output Compare mode, the operation is inverted. The dual-slope operation has
lower maximum operation frequency than single slope operation. However, due to the symmet-
ric feature of the dual-slope P W M modes, these modes are preferred for motor control
applications.
The P W M resolution for the phase correct P W M mode is fixed to 8 bits. In phase correct P W M
mode the counter is incremented until the counter value matches Max W hen the counter
reaches MAX, it changes the count direction. The TCNT2 value will be equal to MAX for one
timer clock cycle. The timing diagram for the phase correct P W M mode is shown on Figure 67 .
The TCNT2 value is in the timing diagram shown as a histogram for illustrating the dual-slope
operation. The diagram includes non-inverted and inverted P W M outputs. The small horizontal
line marks on the TCNT2 slopes represent compare matches between OCR2 and TCNT2.
152
2467X–AVR–06/11
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